Automated Generation of Accurate VLSI Behavioral Processor Models for Simulation and Synthesis
نویسندگان
چکیده
A new process for automating the creation of FullBehavioral (FBM) and Instruction Set Architecture (ISA) models in VHDL for complex processors and components is described, with results from the automation of a PowerPC 601 described in some detail. A number of advantages to this approach are described together with its impact on the hardware/software codesign and system prototyping processes.
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تاریخ انتشار 1998